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Merged
merged 3 commits into from
Jun 7, 2025
+10 −18
Merged

Update stdarch submodule #141964

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41fdc80
Update stdarch submodule
sayantn Jun 3, 2025
d91c1af
Add impl for `llvm.roundeven` in cg_clif
sayantn Jun 3, 2025
fbc15c1
Remove uses of `stdarch_x86_avx512`
sayantn Jun 3, 2025
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2 changes: 1 addition & 1 deletion compiler/rustc_codegen_cranelift/example/neon.rs
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Expand Up @@ -233,7 +233,7 @@ unsafe fn test_vaddvq_f32() {

#[cfg(target_arch = "aarch64")]
unsafe fn test_vrndnq_f32() {
// AArch64 llvm intrinsic: llvm.aarch64.neon.frintn.v4f32
// llvm intrinsic: llvm.roundeven.v4f32
let a = f32x4::from([0.1, -1.9, 4.5, 5.5]);
let e = f32x4::from([0., -2., 4., 6.]);
let r: f32x4 = transmute(vrndnq_f32(transmute(a)));
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8 changes: 8 additions & 0 deletions compiler/rustc_codegen_cranelift/src/intrinsics/llvm.rs
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Expand Up @@ -62,6 +62,14 @@ pub(crate) fn codegen_llvm_intrinsic_call<'tcx>(
});
}

_ if intrinsic.starts_with("llvm.roundeven.v") => {
intrinsic_args!(fx, args => (v); intrinsic);

simd_for_each_lane(fx, v, ret, &|fx, _lane_ty, _res_lane_ty, lane| {
fx.bcx.ins().nearest(lane)
});
}

_ => {
fx.tcx
.dcx()
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8 changes: 0 additions & 8 deletions compiler/rustc_codegen_cranelift/src/intrinsics/llvm_aarch64.rs
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Expand Up @@ -264,14 +264,6 @@ pub(super) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
simd_reduce(fx, v, None, ret, &|fx, _ty, a, b| fx.bcx.ins().fadd(a, b));
}

_ if intrinsic.starts_with("llvm.aarch64.neon.frintn.v") => {
intrinsic_args!(fx, args => (v); intrinsic);

simd_for_each_lane(fx, v, ret, &|fx, _lane_ty, _res_lane_ty, lane| {
fx.bcx.ins().nearest(lane)
});
}

_ if intrinsic.starts_with("llvm.aarch64.neon.smaxv.i") => {
intrinsic_args!(fx, args => (v); intrinsic);

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2 changes: 1 addition & 1 deletion library/stdarch
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Submodule stdarch updated 83 files
+1 −0 ci/run-docker.sh
+1 −1 ci/run.sh
+118 −391 crates/core_arch/src/aarch64/neon/generated.rs
+1 −1 crates/core_arch/src/aarch64/neon/mod.rs
+267 −337 crates/core_arch/src/arm_shared/neon/generated.rs
+9 −4 crates/core_arch/src/arm_shared/neon/mod.rs
+6 −4 crates/core_arch/src/loongarch64/mod.rs
+9 −9 crates/core_arch/src/powerpc/altivec.rs
+9 −9 crates/core_arch/src/s390x/vector.rs
+2 −2 crates/core_arch/src/wasm32/simd128.rs
+2 −2 crates/core_arch/src/x86/avx.rs
+2 −2 crates/core_arch/src/x86/avx2.rs
+42 −42 crates/core_arch/src/x86/avx512bf16.rs
+24 −24 crates/core_arch/src/x86/avx512bitalg.rs
+826 −826 crates/core_arch/src/x86/avx512bw.rs
+42 −42 crates/core_arch/src/x86/avx512cd.rs
+404 −404 crates/core_arch/src/x86/avx512dq.rs
+2,874 −2,874 crates/core_arch/src/x86/avx512f.rs
+6 −6 crates/core_arch/src/x86/avx512fp16.rs
+22 −22 crates/core_arch/src/x86/avx512ifma.rs
+30 −30 crates/core_arch/src/x86/avx512vbmi.rs
+150 −150 crates/core_arch/src/x86/avx512vbmi2.rs
+68 −68 crates/core_arch/src/x86/avx512vnni.rs
+18 −18 crates/core_arch/src/x86/avx512vpopcntdq.rs
+6 −6 crates/core_arch/src/x86/avxneconvert.rs
+175 −142 crates/core_arch/src/x86/gfni.rs
+11 −11 crates/core_arch/src/x86/kl.rs
+25 −25 crates/core_arch/src/x86/mod.rs
+5 −3 crates/core_arch/src/x86/rdtsc.rs
+10 −10 crates/core_arch/src/x86/sha.rs
+24 −24 crates/core_arch/src/x86/vaes.rs
+6 −6 crates/core_arch/src/x86/vpclmulqdq.rs
+2 −2 crates/core_arch/src/x86_64/avx512bw.rs
+30 −30 crates/core_arch/src/x86_64/avx512f.rs
+2 −28 crates/core_arch/src/x86_64/cmpxchg16b.rs
+2 −2 crates/core_arch/src/x86_64/mod.rs
+0 −274 crates/intrinsic-test/src/argument.rs
+64 −0 crates/intrinsic-test/src/arm/compile.rs
+122 −0 crates/intrinsic-test/src/arm/config.rs
+95 −0 crates/intrinsic-test/src/arm/intrinsic.rs
+137 −0 crates/intrinsic-test/src/arm/json_parser.rs
+124 −0 crates/intrinsic-test/src/arm/mod.rs
+195 −0 crates/intrinsic-test/src/arm/types.rs
+209 −0 crates/intrinsic-test/src/common/argument.rs
+113 −0 crates/intrinsic-test/src/common/cli.rs
+90 −0 crates/intrinsic-test/src/common/compare.rs
+154 −0 crates/intrinsic-test/src/common/compile_c.rs
+17 −0 crates/intrinsic-test/src/common/constraint.rs
+198 −0 crates/intrinsic-test/src/common/gen_c.rs
+243 −0 crates/intrinsic-test/src/common/gen_rust.rs
+0 −0 crates/intrinsic-test/src/common/indentation.rs
+51 −0 crates/intrinsic-test/src/common/intrinsic.rs
+296 −0 crates/intrinsic-test/src/common/intrinsic_helpers.rs
+25 −0 crates/intrinsic-test/src/common/mod.rs
+0 −0 crates/intrinsic-test/src/common/values.rs
+66 −0 crates/intrinsic-test/src/common/write_file.rs
+0 −152 crates/intrinsic-test/src/intrinsic.rs
+0 −99 crates/intrinsic-test/src/json_parser.rs
+24 −745 crates/intrinsic-test/src/main.rs
+0 −508 crates/intrinsic-test/src/types.rs
+1 −0 crates/std_detect/Cargo.toml
+27 −15 crates/std_detect/src/detect/arch/riscv.rs
+5 −10 crates/std_detect/src/detect/arch/x86.rs
+59 −2 crates/std_detect/src/detect/cache.rs
+8 −0 crates/std_detect/src/detect/macros.rs
+24 −9 crates/std_detect/src/detect/os/linux/riscv.rs
+3 −0 crates/std_detect/src/detect/os/riscv.rs
+4 −0 crates/std_detect/tests/cpu-detection.rs
+71 −158 crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
+81 −106 crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
+6 −23 crates/stdarch-gen-arm/src/big_endian.rs
+3 −2 crates/stdarch-gen-arm/src/context.rs
+6 −9 crates/stdarch-gen-arm/src/expression.rs
+28 −105 crates/stdarch-gen-arm/src/fn_suffix.rs
+19 −18 crates/stdarch-gen-arm/src/intrinsic.rs
+3 −2 crates/stdarch-gen-arm/src/load_store_tests.rs
+6 −6 crates/stdarch-gen-arm/src/main.rs
+4 −4 crates/stdarch-gen-arm/src/typekinds.rs
+1 −1 crates/stdarch-gen-arm/src/wildstring.rs
+1 −1 crates/stdarch-gen-loongarch/src/main.rs
+1 −1 crates/stdarch-test/src/lib.rs
+2 −0 crates/stdarch-verify/src/lib.rs
+26 −26 examples/connect5.rs
2 changes: 0 additions & 2 deletions src/tools/miri/tests/pass/shims/x86/intrinsics-x86-aes-vaes.rs
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Expand Up @@ -2,8 +2,6 @@
//@only-target: x86_64 i686
//@compile-flags: -C target-feature=+aes,+vaes,+avx512f

#![feature(stdarch_x86_avx512)]

use core::mem::transmute;
#[cfg(target_arch = "x86")]
use std::arch::x86::*;
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2 changes: 0 additions & 2 deletions src/tools/miri/tests/pass/shims/x86/intrinsics-x86-avx512.rs
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Expand Up @@ -2,8 +2,6 @@
//@only-target: x86_64 i686
//@compile-flags: -C target-feature=+avx512f,+avx512vl,+avx512bitalg,+avx512vpopcntdq

#![feature(stdarch_x86_avx512)]

#[cfg(target_arch = "x86")]
use std::arch::x86::*;
#[cfg(target_arch = "x86_64")]
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1 change: 0 additions & 1 deletion src/tools/miri/tests/pass/shims/x86/intrinsics-x86-gfni.rs
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Expand Up @@ -6,7 +6,6 @@
// be interpreted as integers; signedness does not make sense for them, but
// __mXXXi happens to be defined in terms of signed integers.
#![allow(overflowing_literals)]
#![feature(stdarch_x86_avx512)]

#[cfg(target_arch = "x86")]
use std::arch::x86::*;
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1 change: 0 additions & 1 deletion src/tools/miri/tests/pass/shims/x86/intrinsics-x86-vpclmulqdq.rs
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Expand Up @@ -8,7 +8,6 @@
// be interpreted as integers; signedness does not make sense for them, but
// __mXXXi happens to be defined in terms of signed integers.
#![allow(overflowing_literals)]
#![feature(stdarch_x86_avx512)]

#[cfg(target_arch = "x86")]
use std::arch::x86::*;
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2 changes: 0 additions & 2 deletions tests/ui/asm/x86_64/evex512-implicit-feature.rs
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Expand Up @@ -2,8 +2,6 @@
//@ only-x86_64
//@ compile-flags: --crate-type=lib -C target-cpu=skylake

#![feature(stdarch_x86_avx512)]

use std::arch::x86_64::*;

#[target_feature(enable = "avx512f")]
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