Verilog Implementation of a Digital Combinational Lock which unlocks when a specific 3 bit sequence is entered.
-
Updated
Nov 6, 2024 - Verilog
Verilog Implementation of a Digital Combinational Lock which unlocks when a specific 3 bit sequence is entered.
Add a description, image, and links to the combinational-lock topic page so that developers can more easily learn about it.
To associate your repository with the combinational-lock topic, visit your repo's landing page and select "manage topics."